[alsa-devel] ASOC and 12 bit volume control

Mark Brown broonie at opensource.wolfsonmicro.com
Sun Jul 20 21:19:03 CEST 2008


On Sun, Jul 20, 2008 at 02:47:31PM -0400, Jon Smirl wrote:
> On 7/20/08, Mark Brown <broonie at opensource.wolfsonmicro.com> wrote:

> >  also possible that the combination of large registers and high
> >  resolution fields within them may mean that special treatment is
> >  warranted in order to avoid blocking user applications too much with
> >  high volume register writes, but I'm not sure if that's a real issue or
> >  not.

> These chips are capable of processing 192K 24b HD quality audio.
> Datasheet http://www.ti.com/lit/gpn/tas5504
> Do the Intel HD audio chips have similar controls?

A brief look suggests that there's nothing over 32 bits in the register
map.

> I believe the TI codecs are implemented with a combination of an 8051
> core controlling a DSP.  The i2c interface is talking to the 8051
> core, not real hardware registers. The 8051 takes the incoming i2c
> messages and stores them in RAM and uses the info to manipulate the
> DSP.

The issue is the time taken to do the I/O via the I2C bus, not the
implementation in the chip - if anything I'd expect this to be slower
than a direct hardware implementation but not perceptibly.  If
applications try to step through all the values for a control with
anything approaching the available resolution then that'd be a lot of
data being written.  Like I say, it may not be a practical issue (I'd
expect applications to be smarter) but it raised my eyebrows.

> > Are any of these 28 bit controls not in 32 byte registers?

> 0x49-0x50, bass management
> 4 bytes, contain 5.23 coefficients

> The chip supports DRC (compression and expansion), some of the DRC
> parameters are 48bits in 25.23 format. Loudness is 25.23 too.
> 0x92 and 0x94 are examples of 64 bit registers.

OK, so the bass management looks like it should be able to fit in a
processor word?


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