[alsa-devel] [PATCH 1/3] asoc tlv320aic3x: revisit clock setup

[Jarkko Nikula]

On Fri, Apr 25, 2008 at 1:47 PM, Daniel Mack <daniel at caiaq.org> wrote:

> On Fri, Apr 25, 2008 at 01:40:42PM +0300, Jarkko Nikula wrote:
> > > Doesn't work for 64000 kHz since 48000 * 10 / 64000 = 7.5 and later
> > calculations => 7*2 / 5 - 2 = 2 - 2 but this might to work:
>
> Good catch, thanks.
>

This dead code below was there but otherwise I think this is good now.

+        /* printk(KERN_INFO "%s(): bypassing PLL with Q=%d\n",
+            __func__, pll_q); */



Jarkko