[alsa-devel] at91 SoC Modifications
fmandarino at endrelia.com
Fri Jun 22 21:00:44 CEST 2007
Paul Kavan wrote:
> Perhaps it would be useful to see a diagram of the connections between
> the SSC and codec on your board, including directions.
> Attached is a quick diagram. As far as the wiring, they only connect
> where you see a node connection....did not have a real circuit program
> handy. Let me know if you have questions on the diagram. I tried to make
> it as clear as possible.
> I have the bitclocks and codec master clock tied together. Also, I have
> the frames tied together.
The diagram is clear except for the signal directions. I assume that
all signals are outputs from SSC to codec except for RD0 - PCMT.
Could you please provide the settings that you are currently working with?
In particular, I would like to see how RFMR.FSOS is set. If TF0 is
outputting the frame sync and tied to RF0, then you probably want RF0
configured as an input (RFMR.FSOS = None).
And if RF0 and RK0 are receiving signals on their GPIO lines, you do
need to initialize the GPIO registers in your machine driver.
Frank Mandarino fmandarino(a)endrelia.com
Endrelia Technologies Inc.
Toronto, Ontario, Canada
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